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Silicon Labs /RM21Z000F1024IM32 /GPIO_NS /USART0_ROUTEEN

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Interpret as USART0_ROUTEEN

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31282724232019161512118743000000000000000000000000000000000000000000 (CSPEN)CSPEN0 (RTSPEN)RTSPEN0 (RXPEN)RXPEN0 (CLKPEN)CLKPEN0 (TXPEN)TXPEN

Description

No Description

Fields

CSPEN

CS pin enable control bit
RTSPEN

RTS pin enable control bit
RXPEN

RX pin enable control bit
CLKPEN

CLK pin enable control bit
TXPEN

TX pin enable control bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data